Method and apparatus for accessing MMR registers distributed across a large asic
US6779072B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2000 |
| Grant date | Aug 17, 2004 |
| Priority date | — |
| Expiry date | Feb 26, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/206
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for accessing memory-mapped registers that are distributed across a large integrated circuit. Some embodiments provide a method for accessing memory-mapped registers that are distributed across a first integrated circuit, the first integrated circuit including a plurality of logic subset modules, wherein each of the plurality of logic subset modules includes one or more memory-mapped registers. This method includes receiving a memory-mapped register access request into the first integrated circuit, serially transmitting, through each of the plurality of logic subset modules, a first plurality of data packets based on the memory-mapped register access request, wherein the first plurality of data packets includes an address specification for a memory-mapped register associated with a first one of the logic subset modules, and within the first logic subset module, accessing the memory-mapped register associated with the first logic subset module. Another aspect of the present invention provides an MMR circuit for accessing memory-mapped registers that are distributed across a first integrated circuit chip, the first integrated circuit chip including a plurality …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.