Method and apparatus for checkpointing to facilitate reliable execution
US6779087B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 6, 2001 |
| Grant date | Aug 17, 2004 |
| Priority date | — |
| Expiry date | Oct 21, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1471
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention provides a system that facilitates reliable execution in a computer system by periodically checkpointing write operations to a main memory of the computer system. The system operates by receiving a write operation directed to the main memory at a memory controller, wherein the write operation includes data to be written to the main memory and a write address specifying a location in the main memory into which the data is to be written. Next, the system looks up the write address in a checkpoint store coupled to the memory controller. If the write address is not associated with any entry in the checkpoint store, the system creates an entry for the write address in the checkpoint store, and writes the data to be written to the entry. The system then periodically performs a checkpointing operation, which transfers the data to be written from the checkpoint store to the write address in the main memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.