Calibrating return time for resynchronizing data demodulated from a master slave bus
US6779123B2 · kind B2 · utility
5Cited by
4References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2001 |
| Grant date | Aug 17, 2004 |
| Priority date | — |
| Expiry date | Dec 28, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0682
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Calibrating return time includes determining clock calibration information based on clock signals local to a master device and return clock signals corresponding to each of at least two slave devices, storing clock calibration information with respect to each of the slave devices with which the master device will communicate using a bus, and, after the clock calibration information has been stored, resynchronizing data signals that are received from each of the slave devices based on the corresponding stored clock calibration information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.