Reconfigurable processor module comprising hybrid stacked integrated circuit die elements
US6781226B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2003 |
| Grant date | Aug 24, 2004 |
| Priority date | — |
| Expiry date | Jun 2, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/922
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A reconfigurable processor module comprising hybrid stacked integrated circuit (“IC”) die elements. In a particular embodiment disclosed herein, a processor module with reconfigurable capability may be constructed by stacking one or more thinned microprocessor, memory and/or field programmable gate array (“FPGA”) die elements and interconnecting the same utilizing contacts that traverse the thickness of the die. The processor module disclosed allows for a significant acceleration in the sharing of data between the microprocessor and the FPGA element while advantageously increasing final assembly yield and concomitantly reducing final assembly cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.