Apparatus and methods for silicon-on-insulator transistors in programmable logic devices
US6781409B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 23, 2002 |
| Grant date | Aug 24, 2004 |
| Priority date | — |
| Expiry date | Jul 9, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/711
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic device (PLD) includes programmable electronic circuitry. The programmable electronic circuitry allows programming the functionality of the PLD. The programmable electronic circuitry includes one or more of programmable interconnects, pass devices, look-up table circuits, and/or multi-input logic circuits. Each of the programmable interconnects, pass devices, look-up table circuits, and/or multi-input logic circuits includes one or more of dynamic threshold metal oxide semiconductor (DTMOS) transistors, fully depleted metal oxide semiconductor (FDMOS) transistors, partially depleted metal oxide semiconductor (PDMOS) transistors, and/or double-gate metal oxide semiconductor transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.