Low charge-dump transistor switch
US6781434B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2002 |
| Grant date | Aug 24, 2004 |
| Priority date | — |
| Expiry date | Sep 19, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/162
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A switch circuit having low charge dumping characteristics includes multiple parallel connected switching transistors and one or more associated cancellation transistors. The switching transistors perform basic switching functions within the switch circuit in response to a digital signal. During transitions of the digital signal, the switching transistors dump charge on an output node thereof due to parasitic capacitances within the devices. The cancellation transistor(s) dumps charge of an opposite polarity on the output node to cancel the charge dumped by the switching transistors. Two switching transistors are used for each cancellation transistor so that equal sized devices can be used throughout the switch circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.