Circuits and methods for extracting a clock from a biphase encoded bit stream and systems using the same
US6782300B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2000 |
| Grant date | Aug 24, 2004 |
| Priority date | — |
| Expiry date | Feb 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/04
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method of extracting a clock from a biphase encoded bit stream includes the step of detecting a stream of samples each having a sample size measured between consecutive bit phase transitions. A sample length is determined for each sample, the sample length approximating a number of least common multiples in the corresponding sample size. A preamble is detected from the sample lengths of a sequence of the samples and decoded to determine an expected logic level of the clock following a transition at an expected clock edge. The expected level of the clock is gated with the biphase encoded data to generate a control signal in advance of the opening of the time window. The control signal is then gated with the biphase encoded data to extract the clock edge after the time window has opened.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.