Circuit and method for an integrated charged device model clamp
US6784496B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2000 |
| Grant date | Aug 31, 2004 |
| Priority date | — |
| Expiry date | Aug 11, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/811
Abstract
A CDM clamp circuit integrated into the interface circuit it is protecting on an integrated circuit. Generally, the integrated CDM clamp circuit and interface circuit are adjacent to each other and share a common device element or component, thus eliminating the need for a metal interconnect. Because there is no interconnect, the parasitic resistance and inductance are also minimized or eliminated from the circuit, thus reducing or eliminating excessive voltage drop. Preferably, the CDM clamp circuit is integrated into the circuit that it is protecting by having the two circuits share the same silicon source region. In a preferred embodiment input circuit, the same diffusion region is the source of both the input transistor and its associated CDM clamp transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.