Input buffer system using low voltage transistors
US6784717B1 · kind B1 · utility
15Cited by
5References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2002 |
| Grant date | Aug 31, 2004 |
| Priority date | — |
| Expiry date | Aug 28, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/08
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An input buffer system has an input clipping circuit. The input clipping circuit has a high voltage input and uses transistors all being the thin oxide type transistors. A high voltage detect circuit is coupled to the input clipping circuit. An input buffer circuit is coupled to the input clipping circuit and has a low voltage output range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.