Method of manufacturing semiconductor device having buried metal wiring
US6787462B2 · kind B2 · utility
5Cited by
7References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2002 |
| Grant date | Sep 7, 2004 |
| Priority date | — |
| Expiry date | Apr 7, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/902
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A metal wiring buried in an insulating layer is subjected to a reducing treatment prior to formation of a second insulating layer on the insulating layer under the condition that the total partial pressure of oxygen and water vapor is sufficiently low.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.