Integrated power device with improved efficiency and reduced overall dimensions
US6787881B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 4, 2002 |
| Grant date | Sep 7, 2004 |
| Priority date | — |
| Expiry date | Jan 28, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/60
Abstract
An integrated power device having a power transistor made up of a first diode and a second diode that are connected together in series between a collector region and emitter-contact region of the power transistor to define a common intermediate node, a control circuit including a high-voltage region bonded on the emitter-contact region (14) by means of an adhesive layer, and biasing circuit connected between the common intermediate node and the high-voltage region. The biasing circuit including a contact pad electrically connected to the common intermediate node, an electrical connection region that is in electrical contact with the high-voltage region (30), and a wire having a first end soldered on the contact pad and a second end soldered on said electrical connection region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.