Fast sample-and-hold peak detector circuit

US6788115B2 · kind B2 · utility

Assignee

• ALCATEL · FR

Inventors

• Ralph Ballentin · Birkenwerder, DE
• Frank Ilchmann · Berlin, DE

Key dates

• Filing date: Jun 24, 2003
• Grant date: Sep 7, 2004
• Expiry date: Jun 24, 2023

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C27/026
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

This invention relates to circuitry for detecting peak levels of signals and particularly fast hold and sample peak detectors for analyzing signals of generally arbitrary wave shape and form having a high precision, high slew-rate, very short retention, and a low distortion. The circuitry comprising a comparator circuit comprising two signal inputs and a signal output, where the output signal depends from the difference between the input signals, a sample and hold circuit comprising switching means controlled by said signal output for sampling and holding means for holding the output signal, a compensation circuit for compensating residual currents comprising emulating means for emulating residual currents caused by said comparator circuit influencing the functionality of said sample and hold circuit, and an unload circuit comprising a clearing means for decreasing the output signal of said sample and hold circuit.