Output buffer for a nonvolatile memory with output signal switching noise reduction, and nonvolatile memory comprising the same
US6788586B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 30, 2002 |
| Grant date | Sep 7, 2004 |
| Priority date | — |
| Expiry date | May 30, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1051
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described herein is an output buffer including an output stage formed by a pull-up transistor and a pull-down transistor, which are connected in series between a supply line set at a supply potential and a ground line set at a ground potential, with an intermediate node connected to the output of the output buffer. The output buffer further includes a unidirectional decoupling stage arranged between the output of the output buffer and the pull-up transistor for decoupling the output from the supply line during the switching transients of the output buffer in such a way as to prevent the switching noise present on the latter from being transferred onto the output of the output buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.