Method, apparatus, and computer program product for deconfiguring a processor
US6789048B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2002 |
| Grant date | Sep 7, 2004 |
| Priority date | — |
| Expiry date | Oct 1, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2236
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to a method form of the invention, in a computer system having a processing load distributed among a number of processors in the system, test computations are performed at intervals by floating point logic of a processor responsive to stored test instructions. Responsive to the test computations indicating an erroneous result by one of the processors information is passed by a firmware process and entered into an operating system error log. Responsive to the information, an operating system deconfiguration service is notified of the error log entry, and the service deconfigures the indicated processor, while the system is still running.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.