System and method for generating low density parity check codes using bit-filling
US6789227B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2001 |
| Grant date | Sep 7, 2004 |
| Priority date | — |
| Expiry date | Apr 27, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1076
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A computer-implemented system and method is for generating low-density parity check (LDPC) codes. One aspect of the invention includes a method for generating high rate LDPC codes that first constructs a matrix (H) of size m×n having m rows of check nodes and n columns of bit nodes. The matrix meets the following requirements: the weight of the j−th column equals aj; each row, r, has weight at most br; and the matrix H can be represented by a Tanner graph that has a girth of at least g≧g. The method then iteratively adds an (n+1)th column (U1) to matrix H, wherein the size of U1, is initially empty and is at most an+1, and wherein U1, comprises a set of i check nodes such that i is greater than or equal to 0 and i is less than an+1. The method then iteratively adds check nodes to U1. such that each check node does not violate predetermined girth and check-degree constraints. The matrix H is updated when a new column is added. The iterations are terminated if there are no new check nodes that do not violate the girth and check-degree constraints. The method can be modified to optimize various parameters, including the following cases: maximizing the rate for a fixed g…
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