Pattern data generation system, method and program for pattern data generation, reticle fabricating method, and semiconductor device manufacturing method using the pattern data
US6789250B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2002 |
| Grant date | Sep 7, 2004 |
| Priority date | — |
| Expiry date | Feb 23, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F1/00
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A chip division information storage unit configured to register chip division information; a chip layout generation unit configured to generate master mask chip layout information by sequentially allotting sub-patterns to a master mask in an order beginning with the largest from the plurality of sub-patterns; a master mask chip layout information storage unit configured to register the master mask chip layout information; a chip pattern data generation unit configured to generate master mask chip pattern data by referencing the reticle chip pattern data and divide each chip in accordance with the master mask chip layout data; a master mask pattern data information storage unit configured to register the master mask chip pattern data; and a pattern data generation unit configured to generate master mask pattern data by referencing the master mask chip layout information and the master mask chip pattern data, are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.