Integrated circuit arrangement with a transconductance amplifier
US6791415B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 19, 2002 |
| Grant date | Sep 14, 2004 |
| Priority date | — |
| Expiry date | Feb 22, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/331
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention pertains to an integrated circuit arrangement, in particular, in accordance with the CMOS technology, with at least one transconductance amplifier (1) in order to generate a current signal (outp, outm) from an input voltage signal (inp-inm), wherein the transconductance amplifier consists of a first transconductance stage (gm1) and a second transconductance stage (gm2) that are connected in parallel, wherein the first transconductance stage (gm1) has a transconductance that is essentially defined by an ohmic resistance and the second transconductance stage (gm2) has an adjustable transconductance that is essentially defined by a transistor arrangement, and wherein the transconductance of the first transconductance stage (gm1) is higher than the transconductance of the second transconductance stage (gm2).The highly linear transconductance amplifier that can also be adjusted in an infinitely variable fashion is, according to one preferred application, utilized in a continuous-time active filter, e.g., a Gm/C filter, in which a capacitor stage for integrating the output signal is arranged at the output of the transconductance amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.