Packet transfer system
US6792002B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2001 |
| Grant date | Sep 14, 2004 |
| Priority date | — |
| Expiry date | Apr 4, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5658
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The present invention provides a packet transfer system for use in an ATM network, which can realize a high-speed packet transfer by implementing a packet transfer process by hardware and also can enhance the throughput of the packet transfer process implemented by software. This packet transfer system comprises a hardware processing portion, which a memory, a packet assembling portion for causing the memory to store a packet assembled from an ATM cell received from a main circuit or an expansion circuit, a higher layer processing portion for performing higher layer processing portion according to header information sent from the packet assembling portion, and a packet determining/transmitting portion for transmitting a packet, which is determined according to a result of the higher layer processing in the higher layer processing portion as required to undergo packet processing, to an expansion circuit and for transmitting a packet, which is determined according to the result of the higher layer processing as not required to undergo packet processing, in a form of an ATM cell to a main circuit. The packet transfer system may further comprises a software processing portion, which ha…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.