Method for galvanically forming conductor structures of high-purity copper in the production of integrated circuits

US6793795B1 · kind B1 · utility

Assignee

• Atotech Deutschland GmbH & Co. KG · DE

Inventors

• Heinrich Meyer · Berlin, DE
• Andreas Thies · Tirschenreuth, DE

Key dates

• Filing date: May 11, 2001
• Grant date: Sep 21, 2004
• Expiry date: May 11, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/2885
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method is disclosed for electrolytically forming conductor structures from highly pure copper on surfaces of semiconductor substrates, which surfaces are provided with recesses, when producing integrated circuits. The method includes the steps of coating the surfaces of the semiconductor substrates with a full-surface basic metal layer in order to achieve sufficient conductance for the electrolytic depositions, depositing full-surface deposition of copper layers of uniform layer thickness on the basic metal layer by an electrolytic metal deposition method, and structuring the copper layer. The electrolytic metal deposition method is accomplished by bringing the semiconductor substrates into contact with a copper deposition bath containing at least one copper ion source, at least one additive compound for controlling the physico-mechanical properties of the copper layers, and Fe(II) and/or Fe(III) compounds, and applying an electric voltage between the semiconductor substrates and dimensionally stable counter-electrodes.