Methods of fabricating a MOSFET
US6794233B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2003 |
| Grant date | Sep 21, 2004 |
| Priority date | — |
| Expiry date | Jul 25, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a MOSFET is disclosed. The disclosed MOSFET-fabricating method comprises the steps of forming a polysilicon gate electrode on a semiconductor substrate; forming a first doping layer on the entire area of the semiconductor substrate including the polysilicon gate electrode; implanting some dopant into the first doping layer by means of a high-tilt angle pocket ion implantation; forming LDD regions on the surface of the substrate at both sides of the polysilicon gate electrode by diffusing the dopant of the first doping layer into the semiconductor substrate at the same time as forming an insulating layer on the first doping layer; forming a spacer by etching the insulating layer and the first doping layer; forming a second doping layer on the semiconductor substrate and the polysilicon gate electrode with the spacer; and forming source and drain regions on the surface of the semiconductor substrate at both sides of the polysilicon gate electrode with the spacer by conducting a thermal treatment process so that the dopant of the second doping layer can be diffused into the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.