Extending non-volatile memory endurance using data encoding
US6794997B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 18, 2003 |
| Grant date | Sep 21, 2004 |
| Priority date | — |
| Expiry date | Feb 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/16
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An embedded system comprising a CPU and non-volatile memory is adapted to extend the endurance of the non-volatile memory through the use of an encoding of information stored in the non-volatile memory. One or more data bits are encoded into a larger number of non-volatile memory bit patterns such that changes to the data bits are distributed across fewer changes per non-volatile memory bit. Non-volatile memory endurance is extended since more changes to the data values are possible than can be supported by underlying changes to individual non-volatile memory bits. Word pre-erase, if present, can be accommodated as well as memory bit failures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.