System and method to substantially eliminate glitch in a digital to analog converter
US6795008B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 22, 2003 |
| Grant date | Sep 21, 2004 |
| Priority date | — |
| Expiry date | Sep 22, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/742
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system (e.g., a digital-to-analog converter (DAC)) includes a digital section and an analog section. The digital section has drivers that generate drive signals based on received digital input signals. The drive signals are received at switches in the analog section of the DAC. The switches generate analog signals therefrom. Swing values of the drive signals are limited to a predetermined amount to substantially eliminate glitch in the analog signals. The drivers can be coupled between first and second nodes that receive different power signal values. Controlling the power signal values allows for the limiting of the swing values. Limiting the swing values limits stored charged in the first and second switches, which substantially eliminates glitch in the analog signals. This can be done regardless on environmental variances (e.g., temperature variance) during operation of the DAC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.