Multi-layer capacitor and method for producing the same
US6795295B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2003 |
| Grant date | Sep 21, 2004 |
| Priority date | — |
| Expiry date | Oct 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/30
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multi-layer capacitor including a capacitor body including dielectric layers, and first and second internal electrode layers which are alternately laminated by mediation of the dielectric layers. The laminate of the first and second internal electrode layers and the dielectric layers are co-fired. The capacitor body further includes first and second electrode terminals formed on one main surface of the capacitor body. At least a single first via electrode extends through the capacitor body in the lamination direction of the capacitor body so as to connect the first electrode terminal and the first internal electrode layers, and at least a single second via electrode extends through the capacitor body in the lamination direction of the capacitor body so as to connect the second electrode terminal and the second internal electrode layers. The via electrodes have an aspect ratio of 4 to 30 as measured after firing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.