Power controlling method for semiconductor storage device and semiconductor storage device employing same
US6795362B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 27, 2002 |
| Grant date | Sep 21, 2004 |
| Priority date | — |
| Expiry date | Sep 13, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2227
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for controlling power for a semiconductor storage device and the semiconductor storage device are provided which enable power consumption to be greatly reduced in a standby state. The power control method uses an ultra-low power consumption mode in which power control can be exerted in the standby state. In the ultra-low power consumption mode, a burst self-refresh state, power-OFF state, and power-ON state are provided. In the burst self-refresh state, memory cells are refreshed in a centralized manner. In the power-OFF state, an internal power source circuit can be partially turned OFF. In the power-ON state, internal power sources having been partially turned OFF are turned ON. Therefore, it is possible to greatly reduce power consumption in the standby state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.