Method and apparatus for locating sampling points in a synchronous data stream
US6795515B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2000 |
| Grant date | Sep 21, 2004 |
| Priority date | — |
| Expiry date | Apr 11, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/046
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An apparatus and process for updating a sample time in a serial link which converts serial data in parallel data. A delay line stores multiple samples of at least two data bits received over the serial link. The contents of the delay line are matched so that they can be analyzed by a processor to determine an optimum sampling position in the delay line. The processor is programmed to analyze contents of the latch by creating a sample mask from a plurality of delay line samples. The sample mask identifies transition edges of first and second data bits within the delay line. The transition edges are validated with respect to the presence, for first and second initial sampling positions for the respective data bits. New sampling positions are determined from the validated edges, and the initial sampling positions are updated with sampling positions which have been determined from the new sampling positions. In this way phase jitter induced by environmental concerns is minimized using new sampling positions along the delay line for coding the data into parallel data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.