Processor resource access control with response faking
US6795939B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2001 |
| Grant date | Sep 21, 2004 |
| Priority date | — |
| Expiry date | Sep 2, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Resource access control is provided in a manner that avoids unnecessary resource accesses where a resource is already known to be faulty. The resource can be a memory location, a peripheral or any other addressable system component. A resource access mechanism in a processor controls access to resources. The resource access mechanism includes an address control mechanism having a plurality of address control entries, each address control entry providing fake response identification indicating whether or not a response for the corresponding address is to be faked. The resource access mechanism also includes a fake response generator for selectively generating a faked response for an address in response to the fake response identification of the corresponding address control entry indicating that a response is to be faked.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.