Flexible routing channels among vias
US6797999B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2002 |
| Grant date | Sep 28, 2004 |
| Priority date | — |
| Expiry date | Jun 7, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Flexible routing channels among vias is disclosed. A semiconductor device of one embodiment includes a number of metal layers, a number of dielectric layers, a number of via holes, and a number of routing channels. The metal layers are organized along a vertical axis. The dielectric layers are alternatively positioned relative to the metal layers. The via holes are situated within the dielectric layers and electrically connect a lower layer of the metal layers to an upper layer of the metal layers. The routing channels are situated within the metal layers and provide for electrical routing through the device along at least one of two horizontal axes of a horizontal plane perpendicular to the vertical axis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.