Clamping circuit and method for DMOS drivers
US6798271B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 4, 2003 |
| Grant date | Sep 28, 2004 |
| Priority date | — |
| Expiry date | Apr 4, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/6872
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A transconductance circuit (16) and method for protecting an H-bridge power circuit (10) that provides power to a load that includes an inductive component (14) connected between one side of the inductive component (14) and a gate (25) of a low side transistor (24) of the H-bridge (10). The transconductance circuit (16) operates to pull current from the inductive component (14) to ground (30) when the inductive load (14) sources current to a body diode of the high side transistor (20). The transconductance circuit (16) creates a regulated voltage to the gate (25) of the low side transistor (24) to cause the low side transistor (24) to conduct the current away in a regulated manner from the inductor (14) and the high side transistor (20) to ground (30).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.