Reduced potential generation circuit operable at low power-supply potential
US6798276B2 · kind B2 · utility
10Cited by
14References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2002 |
| Grant date | Sep 28, 2004 |
| Priority date | — |
| Expiry date | Aug 14, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/262
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A power supply circuit includes a first NMOS-type current mirror circuit which compares a first potential with a second potential, a second NMOS-type current mirror circuit which compares the first potential with a third potential, and a potential setting circuit which adjusts the first potential in response to outputs of the first and second NMOS-type current mirror circuits, such that the first potential falls between the second potential and the third potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.