Digitally controlled variable offset amplifier
US6798293B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2003 |
| Grant date | Sep 28, 2004 |
| Priority date | — |
| Expiry date | Jul 30, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/46
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
First and second differential transistor pairs, where each may be intentionally unbalanced or balanced, are provided. First and second digitally variable current generators are coupled to control respective tail currents of the first and second differential pairs. A switch circuit may be coupled to equalize the voltages of the respective tail current nodes. A common mode feedback circuit is also described, to improve common mode rejection of the overall amplifier. Applications of the amplifier circuit include sense amplifiers and comparators.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.