Lock detector for delay or phase locked loops
US6798858B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2000 |
| Grant date | Sep 28, 2004 |
| Priority date | — |
| Expiry date | Feb 4, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/101
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a lock indicator circuit used to indicate a phase lock condition between logic signals. The lock indicator circuit uses a phase detector that generates a pulse width proportional to the phase difference between a reference signal and a feedback signal. Another circuit generates, on each positive edge of the reference and the feedback signals, pulses whose widths are primarily dependent on fixed delay elements. These fixed pulse determine a window in which the pulse from the phase detector will fall as the two signals approach phase lock. Phase lock is signaled by the logic AND of the window pulse and the phase detector pulse. Other circuitry generates a phase lock indication signal if the phase lock signal remains true for a number of consecutive transitions of the reference signal. Likewise a phase unlock indication signal is generated if after phase lock indication, phase unlock occurs and remains for a number of consecutive transitions of the reference signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.