Parallel amplifier architecture using digital phase control techniques
US6799020B1 · kind B1 · utility
101Cited by
12References
56Claims
0Family size
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Key dates
| Filing date | Jul 20, 1999 |
| Grant date | Sep 28, 2004 |
| Priority date | — |
| Expiry date | Jul 20, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/21163
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An improved method and apparatus for using parallel amplifiers to efficiently amplify an information signal are disclosed. The improved apparatus utilizes digital signal manipulation techniques in optimizing the phase of the upconverted input signals provided to each of the parallel amplifiers. The phase and amplitude of the input signals are adjusted such that the power measured at the output of a combiner is maximized as compared to the sum of the power of combiner input signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.