A/D conversion method and apparatus therefor
US6801150B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 21, 2003 |
| Grant date | Oct 5, 2004 |
| Priority date | — |
| Expiry date | Feb 21, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/207
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An A/D conversion apparatus includes four A/D conversion units, each comprising ring delay lines, pulse selectors for detecting the positions reached by pulse signals in the ring delay lines, encoders for converting the reached positions that are detected into ma-bit digital values, mb-bit counters for counting the number of times the pulse signals have circulated through the ring delay lines, and latch circuits for latching the results counted by the counters. A control circuit sends digital values obtained from the A/D conversion units to a signal processing circuit which adds up together the digital values to calculate a digital value having the number of bits larger than that of the initial digital value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.