Circuit arrangement and method of detecting access violation in a microcontroller
US6802027B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2002 |
| Grant date | Oct 5, 2004 |
| Priority date | — |
| Expiry date | Jul 6, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG07F7/1008
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
To provide an electric or electronic circuit arrangement as well as a method of detecting and/or identifying and/or recording at least an access violation, particularly at least a memory access violation, in a microcontroller provided particularly for a chip card or smart card, with which the source causing this access violation (referred to as break source) as well as the code address occurring upon this violation can be detected and/or identified and/or recorded when an access violation occurs during the program run, the circuit arrangement comprises at least a memory unit; at least an interface unit assigned to the memory unit; at least a processor unit connected to the memory unit particularly via the interface unit for executing instruction codes. These instruction codes can be requested from the interface unit by means of at least a request unit; are run up in at least a fetch or request queue in the request unit; and are decodable by means of at least a decoding unit assigned to the processor unit for running the fetch or request queue, in which a given category of access violation codes is assignable to each given category of access violations. The access violation code rep…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.