Bipolar transistor and method for making the same
US6803289B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2002 |
| Grant date | Oct 12, 2004 |
| Priority date | — |
| Expiry date | Jun 28, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A method for fabricating a bipolar transistor is provided. In some cases, the method may include patterning an epitaxial layer to expose one or more regions of a semiconductor topography. The method may further include depositing an intermediate layer above the exposed regions and remaining portions of the epitaxial layer. A conductive emitter structure may then be formed above and within the intermediate layer. In another embodiment, the method may include etching a first dielectric layer in alignment with a patterned base of a bipolar transistor while simultaneously etching a second dielectric layer in alignment with a patterned emitter structure of the bipolar transistor. In yet other embodiments, the method may include depositing an intermediate layer which is substantially etch resistant to a resist stripping process. In addition or alternatively, the intermediate layer may include etch characteristics that are substantially similar to a conductive layer formed above the intermediate layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.