Negative voltage output charge pump circuit
US6803807B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2003 |
| Grant date | Oct 12, 2004 |
| Priority date | — |
| Expiry date | Feb 5, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/071
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
In a negative voltage output charge pump circuit, first a capacitor C1 is charged with a positive voltage Vin relative to a reference voltage, and then the high-potential terminal A of the capacitor C1 is made to conduct to the reference voltage and simultaneously the low-potential terminal B of the capacitor C1 is made to conduct to an output terminal OUT so that the voltage with which the capacitor C1 is charged is output as a negative voltage −Vin. Here, at least one of the switching device DP1 that is kept on while the capacitor C1 is being charged so as to apply the reference voltage to the point B and the switching device DP2 that is kept on while the negative voltage is being output so as to make the point B conduct to the output terminal OUT is a depletion-type transistor. This configuration makes it possible to realize a negative voltage output charge pump circuit that is free from malfunctioning caused by a parasitic device, that operates with low loss, and that can be produced at low costs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.