Thermal bus for electronics systems
US6804117B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2003 |
| Grant date | Oct 12, 2004 |
| Priority date | — |
| Expiry date | Jul 28, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K7/20827
- WIPO fieldThermal processes and apparatus
- WIPO sectorMechanical engineering
Abstract
A thermal management system for an electronic device is provided a first thermal energy transfer assembly that is thermally coupled between a heat generating structure located on a circuit card and a first thermal interface surface that is spaced away from the heat generating structure. A second thermal energy transfer assembly includes a second thermal interface surface which is arranged in confronting relation to the first thermal interface surface. A clamping mechanism is arranged to move the second thermal interface surface between (i) a first position that is spaced away from the first thermal interface surface, and (ii) a second position wherein the second thermal interface surface is pressed against the first thermal interface surface so as to allow the busing of thermal energy from the first thermal energy transfer assembly to the second thermal energy transfer assembly by heat transfer from the first thermal interface surface to the second thermal interface surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.