Charging circuit and semiconductor memory device using the same
US6804157B2 · kind B2 · utility
0Cited by
7References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 4, 2004 |
| Grant date | Oct 12, 2004 |
| Priority date | — |
| Expiry date | Feb 4, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A charging circuit includes a charging driving circuit, a time constant circuit, a control circuit, a voltage detection circuit, and a delay and inversion circuit. The charging driving circuit starts a charging operation in accordance with a delay signal output from the delay and inversion circuit, and terminates the charging operation in accordance with a detection signal output from the voltage detection circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.