System integrated circuit
US6804742B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2000 |
| Grant date | Oct 12, 2004 |
| Priority date | — |
| Expiry date | May 8, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3648
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system integrated circuit that identifies the cause of a malfunction even if the number of output terminals of a system LSI to be assigned to internal buses in the system LSI is strictly restricted. Comparators 11 to 15 are connected to any of a plurality of buses. Each comparator judges whether a certain expected value matches data transferred on a bus connected to the comparator. The selector unit 10 selects one of the plurality of buses in accordance with the judgement result of the comparator, and outputs data transferred on the selected bus to outside the system integrated circuit so that an observer can observe internal state of the system integrated circuit from outside.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.