Method for adaptive arbitration of requests for memory access in a multi-stage pipeline engine
US6804758B2 · kind B2 · utility
8Cited by
4References
11Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 29, 2001 |
| Grant date | Oct 12, 2004 |
| Priority date | — |
| Expiry date | Sep 14, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1642
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a method for adaptive arbitration of requests for accessing a memory unit in a multi-stage pipeline engine that includes a plurality of request queues corresponding to the stages of the pipeline engine, each of the request queues is assigned to one of a high-priority group and a low-priority group in accordance with an operating state of the memory unit. The request queues in the high-priority group are then processed prior to the request queues in the low-priority group.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.