Write clock and data window tuning based on rank select
US6804764B2 · kind B2 · utility
194Cited by
6References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 22, 2002 |
| Grant date | Oct 12, 2004 |
| Priority date | — |
| Expiry date | Jun 22, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1694
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A configuration register used to adjust a clock or request signal with respect to the other. Specifically, a look-up table is provided in the memory controller. The look-up table is filled at bootup such that it contains test information from a master look-up table in the system BIOS, for instance. The look-up table in the memory controller stores current test data correlative to optimal sampling times for the current configuration. Adjustable delay elements or adjustable load elements may be used to change the relative sampling time of the request signal correlative to the values stored in the memory controller look-up table.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.