Charge balancing circuit
US6806686B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 25, 2003 |
| Grant date | Oct 19, 2004 |
| Priority date | — |
| Expiry date | Apr 25, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02J7/0016
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A charge balancing circuit is disclosed that is configured to provide charge balancing for a bank of series connected charge storage devices such as capacitors. One embodiment of the charge balancing circuit comprises a voltage divider, an operational amplifier, and a negative feedback resistor connected between every two capacitors. The circuit is configured to monitor the voltage in each of the capacitors and, if the voltage in one of the capacitors is higher than the other, the circuit transfers energy from the higher charged capacitor to the lower charged capacitor until the capacitors are balanced. A current limiting resistor can be included for limiting the output current of the operational amplifier to a safe value and for providing feedback information regarding the health of the capacitor. An additional gain stage can also be included for increasing the output current of the operational amplifier for banks of large charge storage devices such as capacitors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.