Level shifting circuit and active matrix driver
US6806734B2 · kind B2 · utility
6Cited by
5References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2003 |
| Grant date | Oct 19, 2004 |
| Priority date | — |
| Expiry date | Mar 24, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0289
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A level shifting circuit comprises a first low power, low speed level shifter 30 and a second high power, high speed level shifter stage 31. Both the stages 30, 31 have signal inputs connected to a common input IN for receiving signals, at least one of whose levels is to be shifted. The output of the first stage 30 is connected to an enable input EN2 of the second stage 31 and switches the operation of the second stage 31 between an enabled state and a disabled state in which the second stage 31 consumes little or no power. The first stage 30 has an enable input EN1 which may be permanently enabled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.