Output circuit and microcomputer
US6806747B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2002 |
| Grant date | Oct 19, 2004 |
| Priority date | — |
| Expiry date | Dec 20, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/223
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
When a control power source voltage becomes lower than an operation guarantee voltage level, the output of a start-up circuit assumes an H-level, a NOR gate produces an output shut-off signal of an L-level, and FETs are turned off. As the control power source voltage further decreases, the output shut-off control circuit loses stability in the operation. In this case, a resistor maintains the FETs in the OFF state due to its pull-down operation. As a result, the output of the output circuit is maintained in a high-impedance state over the whole range of control power source voltages lower than the operation guarantee voltage level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.