Balanced power amplifier with a bypass structure
US6806768B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2001 |
| Grant date | Oct 19, 2004 |
| Priority date | — |
| Expiry date | Feb 5, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/198
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A balanced power amplifier circuit arrangement comprises a driver amplifier stage (22) adapted to receive and amplify a signal. The amplified signal is input to a first coupler (26). The first coupler (26) produces an in-phase signal and an out-of-phase quadrature signal. A first power amplifier (38) receives and amplifies the in-phase signal. A second power amplifier (40) receives and amplifies the out-of-phase signal. A first switch (28) alternately connects an isolated port of the first coupler to ground (32) or a bypass path (36). A second coupler (42) receives and combines the amplified in-phase signal and the amplified out-of-phase signal to produce a combined signal. A second switch (30) alternately connects an isolated port of the second coupler (42) to either ground (34) or the bypass path (36). When the power amplifiers (38, 40) are powered down, the first coupler (26) splits the RF-signal into an in-phase signal and an out-of-phase signal. The power amplifiers (38, 40) appear as reflective impedances to the signal when they are powered down. Each signal reflects off the first and second power amplifiers (38, 40), respectively. The first coupler (26) combines the reflecte…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.