Method and systems to measure propagation delay in semiconductor chips
US6807509B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2002 |
| Grant date | Oct 19, 2004 |
| Priority date | — |
| Expiry date | Dec 26, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3016
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and systems to evaluate the propagation delay within a semiconductor chip (305) that is embedded in an electronic system without requiring measurement apparatus and specific electrical contacts is disclosed. Since most of electronic systems use a microprocessor, the basic principle of the invention consists in using the microprocessor capabilities to measure the propagation delay of a chip embedded in such an electronic system. Thus, according to the invention, the microprocessor transmits an instruction to the semiconductor chip that performs propagation delay evaluation and then read the result in a dedicated memory register (415) of the chip. As a consequence, the chip does not require dedicated pins and measurement apparatus. In order to measure the propagation delay, the chip comprise a logic path (400) wherein propagation delay is created, then a rising edge detector (405) is used to analyze logic path signals, A counter (410) based on a system clock is used to measure propagation delay. The content of the counter is stored in a memory register (415) of the chip (305).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.