Power semiconductor device
US6809349B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2003 |
| Grant date | Oct 26, 2004 |
| Priority date | — |
| Expiry date | Jan 30, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/513
Abstract
A power semiconductor device includes trenches disposed in a first base layer of a first conductivity type at intervals to partition main and dummy cells, at a position remote from a collector layer of a second conductivity type. In the main cell, a second base layer of the second conductivity type, and an emitter layer of the first conductivity type are disposed. In the dummy cell, a buffer layer of the second conductivity type is disposed. A gate electrode is disposed, through a gate insulating film, in a trench adjacent to the main cell. A buffer resistor having an infinitely large resistance value is inserted between the buffer layer and emitter electrode. The dummy cell is provided with an inhibiting structure to reduce carriers of the second conductivity type to flow to and accumulate in the buffer layer from the collector layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.