Scheduling circuitry and methods
US6810043B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 1999 |
| Grant date | Oct 26, 2004 |
| Priority date | — |
| Expiry date | May 5, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5681
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Scheduling circuitry, for use for example in an ATM network unit to schedule cell transmissions, includes a master calendar (1) for holding entries corresponding respectively to events (cell transmissions) that are to occur within a preselected master-calendar scheduling range (SR), and a slave calendar (12) for holding entries corresponding respectively to events that are to occur beyond that scheduling range. When an event is to be scheduled, calendar control circuitry (24) makes an entry corresponding thereto in the slave calendar (12) if the interval between a current time and a desired scheduling time for the event exceeds said scheduling range. The entry in the slave calendar includes timing information representing the desired scheduling time. The calendar control circuitry monitors the entries in the slave calendar (12) and causes an entry therein whose corresponding event becomes within the scheduling range to be transferred to the master calendar (1).Such scheduling circuitry can deal effectively with events that are to be scheduled at widely disparate intervals (very short and very long) without requiring the calendars to be large and without complicated processing of th…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.