Semiconductor device
US6812575B2 · kind B2 · utility
66Cited by
14References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 28, 2001 |
| Grant date | Nov 2, 2004 |
| Priority date | — |
| Expiry date | Aug 28, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a semiconductor device with a plurality of semiconductor chips stacked on a substrate, a wiring layer disposed so as to be sandwiched between the semiconductor chips, and a plurality of bonding pads, for connecting a bonding wire, provided on the wiring layer, are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.