Programmable termination with DC voltage level control
US6812734B1 · kind B1 · utility
33Cited by
57References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2002 |
| Grant date | Nov 2, 2004 |
| Priority date | — |
| Expiry date | Sep 27, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0298
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Various embodiments for implementing circuits and systems with highly flexible interface circuitry that is capable of realizing programmable on-chip termination and DC level control. A number of techniques use existing I/O resources to implement programmable on-chip termination and DC level control that enable an integrate circuit to meet a variety of different high speed single-ended and differential I/O standards.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.